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  high voltage switchmode  series dpak for surface mount applications this device is designed for highvoltage, highspeed power switching inductive circuits where fall time is critical. it is particularly suited for 115 and 220 v switchmode applications such as switching regulators, inverters, motor controls, solenoid/relay drivers and deflection circuits. ? lead formed for surface mount applications in plastic sleeves (no suffix) ? straight lead version in plastic sleeves (a1o suffix) ? lead formed version in 16 mm tape and reel (at4o suffix) ? reverse biased soa with inductive loads @ t c = 100  c ? inductive switching matrix 0.5 to 1.5 amp, 25 and 100  c... t c @ 1.0 a, 100  c is 290 ns (typ) ? 700 v blocking capability ? switching and soa applications information ? electrically similar to the popular mje13003 ??????????????????????? ??????????????????????? maximum ratings ????????????? ????????????? rating ????? ????? symbol ????? ????? value ??? ??? unit ????????????? ????????????? collectoremitter voltage ????? ????? v ceo(sus) ????? ????? 400 ??? ??? vdc ????????????? ????????????? collectoremitter voltage ????? ????? v cev ????? ????? 700 ??? ??? vdc ????????????? ????????????? emitter base voltage ????? ????? v ebo ????? ????? 9 ??? ??? vdc ????????????? ? ??????????? ? ????????????? collector current e continuous e peak (1) ????? ? ??? ? ????? i c i cm ????? ? ??? ? ????? 1.5 3 ??? ? ? ? ??? adc ????????????? ? ??????????? ? ????????????? base current e continuous e peak (1) ????? ? ??? ? ????? i b i bm ????? ? ??? ? ????? 0.75 1.5 ??? ? ? ? ??? adc ????????????? ? ??????????? ? ????????????? emitter current e continuous e peak (1) ????? ? ??? ? ????? i e i em ????? ? ??? ? ????? 2.25 4.5 ??? ? ? ? ??? adc ????????????? ? ??????????? ? ????????????? total power dissipation @ t a = 25  c (2) derate above 25  c ????? ? ??? ? ????? p d ????? ? ??? ? ????? 1.56 0.0125 ??? ? ? ? ??? watts w/  c ????????????? ? ??????????? ? ????????????? total power dissipation @ t c = 25  c derate above 25  c ????? ? ??? ? ????? p d ????? ? ??? ? ????? 15 0.12 ??? ? ? ? ??? watts w/  c ????????????? ? ??????????? ? ????????????? operating and storage junction temperature range ????? ? ??? ? ????? t j , t stg ????? ? ??? ? ????? 65 to +150 ??? ? ? ? ???  c ??????????????????????? ??????????????????????? thermal characteristics ????????????? ????????????? characteristic ????? ????? symbol ????? ????? max ??? ??? unit ????????????? ????????????? thermal resistance, junction to case ????? ????? r q jc ????? ????? 8.33 ??? ???  c/w ????????????? ????????????? thermal resistance, junction to ambient (2) ????? ????? r q ja ????? ????? 80 ??? ???  c/w ????????????? ? ??????????? ? ????????????? maximum lead temperature for soldering purposes ????? ? ??? ? ????? t l ????? ? ??? ? ????? 260 ??? ? ? ? ???  c (1) pulse test: pulse width = 5 ms, duty cycle  10%. (2) when surface mounted on minimum pad sizes recommended. switchmode are trademarks of on semiconductor, inc. ? semiconductor components industries, llc, 2001 january, 2001 rev. 1 1 public mjd13003/d mjd13003 npn silicon power transistor 1.5 amperes 400 volts 15 watts minimum pad sizes recommended for surface mounted applications 0.243 6.172 0.063 1.6 0.118 3.0 0.07 1.8 0.165 4.191 0.190 4.826 inches mm case 369a13 case 36907
mjd13003 http://onsemi.com 2 ????????????????????????????????? ????????????????????????????????? electrical characteristics (t c = 25  c unless otherwise noted) ???????????????????? ???????????????????? characteristic ????? ????? symbol ??? ??? min ???? ???? typ ??? ??? max ??? ??? unit ????????????????????????????????? ????????????????????????????????? off characteristics (1) ???????????????????? ? ?????????????????? ? ???????????????????? collectoremitter sustaining voltage (i c = 10 ma, i b = 0) ????? ? ??? ? ????? v ceo(sus) ??? ? ? ? ??? 400 ???? ? ?? ? ???? e ??? ? ? ? ??? e ??? ? ? ? ??? vdc ???????????????????? ? ?????????????????? ? ???????????????????? collector cutoff current (v cev = rated value, v be(off) = 1.5 vdc) (v cev = rated value, v be(off) = 1.5 vdc, t c = 100  c) ????? ? ??? ? ????? i cev ??? ? ? ? ??? e e ???? ? ?? ? ???? e e ??? ? ? ? ??? 0.1 2 ??? ? ? ? ??? madc ???????????????????? ? ?????????????????? ? ???????????????????? emitter cutoff current (v eb = 9 vdc, i c = 0) ????? ? ??? ? ????? i ebo ??? ? ? ? ??? e ???? ? ?? ? ???? e ??? ? ? ? ??? 1 ??? ? ? ? ??? madc ????????????????????????????????? ????????????????????????????????? second breakdown ???????????????????? ???????????????????? second breakdown collector current with base forward biased ????? ????? i s/b ???????? ???????? see figure 11 ??? ??? ???????????????????? ???????????????????? clamped inductive soa with base reverse biased ????? ????? rbsoa ???????? ???????? see figure 12 ??? ??? ????????????????????????????????? ????????????????????????????????? on characteristics (1) ???????????????????? ? ?????????????????? ? ???????????????????? dc current gain (i c = 0.5 adc, v ce = 2 vdc) (i c = 1 adc, v ce = 2 vdc) ????? ? ??? ? ????? h fe ??? ? ? ? ??? 8 5 ???? ? ?? ? ???? e e ??? ? ? ? ??? 40 25 ??? ? ? ? ??? e ???????????????????? ? ?????????????????? ? ? ?????????????????? ? ? ?????????????????? ? ???????????????????? collectoremitter saturation voltage (i c = 0.5 adc, i b = 0.1 adc) (i c = 1 adc, i b = 0.25 adc) (i c = 1.5 adc, i b = 0.5 adc) (i c = 1 adc, i b = 0.25 adc, t c = 100  c) ????? ? ??? ? ? ??? ? ? ??? ? ????? v ce(sat) ??? ? ? ? ? ? ? ? ? ? ??? e e e e ???? ? ?? ? ? ?? ? ? ?? ? ???? e e e e ??? ? ? ? ? ? ? ? ? ? ??? 0.5 1 3 1 ??? ? ? ? ? ? ? ? ? ? ??? vdc ???????????????????? ? ?????????????????? ? ? ?????????????????? ? ???????????????????? baseemitter saturation voltage (i c = 0.5 adc, i b = 0.1 adc) (i c = 1 adc, i b = 0.25 adc) (i c = 1 adc, i b = 0.25 adc, t c = 100  c) ????? ? ??? ? ? ??? ? ????? v be(sat) ??? ? ? ? ? ? ? ??? e e e ???? ? ?? ? ? ?? ? ???? e e e ??? ? ? ? ? ? ? ??? 1 1.2 1.1 ??? ? ? ? ? ? ? ??? vdc ????????????????????????????????? ????????????????????????????????? dynamic characteristics ???????????????????? ? ?????????????????? ? ???????????????????? currentgain e bandwidth product (i c = 100 madc, v ce = 10 vdc, f = 1 mhz) ????? ? ??? ? ????? f t ??? ? ? ? ??? 4 ???? ? ?? ? ???? 10 ??? ? ? ? ??? e ??? ? ? ? ??? mhz ???????????????????? ? ?????????????????? ? ???????????????????? output capacitance (v cb = 10 vdc, i e = 0, f = 0.1 mhz) ????? ? ??? ? ????? c ob ??? ? ? ? ??? e ???? ? ?? ? ???? 21 ??? ? ? ? ??? e ??? ? ? ? ??? pf ????????????????????????????????? ????????????????????????????????? switching characteristics ????????????????????????????????? ????????????????????????????????? resistive load (table 1) ?????? ?????? delay time ??????????????? ??????????????? ????? ????? t d ??? ??? e ???? ???? 0.05 ??? ??? 0.1 ??? ??? m s ?????? ?????? rise time ??????????????? ??????????????? v cc = 125 vdc, i c = 1 a, i i 02a t 25 m s ????? ????? t r ??? ??? e ???? ???? 0.5 ??? ??? 1 ??? ??? m s ?????? ?????? storage time ??????????????? ??????????????? i b1 = i b2 = 0.2 a, t p = 25 m s, dut y c y cle 1% ????? ????? t s ??? ??? e ???? ???? 2 ??? ??? 4 ??? ??? m s ?????? ?????? fall time ??????????????? ??????????????? duty cycle 1% ????? ????? t f ??? ??? e ???? ???? 0.4 ??? ??? 0.7 ??? ??? m s ????????????????????????????????? ????????????????????????????????? inductive load, clamped (table 1, figure 13) ?????? ?????? storage time ??????????????? ??????????????? i c = 1 a , v clam p = 300 v dc, ????? ????? t sv ??? ??? e ???? ???? 1.7 ??? ??? 4 ??? ??? m s ?????? ?????? crossover time ??????????????? ??????????????? i c = 1 a , v clamp = 300 vdc , i b1 = 0.2 a, v be(off) = 5 vdc, ????? ????? t c ??? ??? e ???? ???? 0.29 ??? ??? 0.75 ??? ??? m s ?????? ?????? fall time ??????????????? ??????????????? b1 , be(off) , t c = 100  c ????? ????? t fi ??? ??? e ???? ???? 0.15 ??? ??? e ??? ??? m s (1) pulse test: pulse width = 300 m s, duty cycle  2%.
mjd13003 http://onsemi.com 3 c, capacitance (pf) v ce , collector-emitter voltage (volts ) 0.02 i c , collector current (amp) 0.35 0.3 0.2 1.4 i c , collector current (amp) 1.2 1 0.8 0.6 0.02 figure 1. dc current gain i c , collector current (amp) 4 0.05 0.1 0.7 2 10 figure 2. collector saturation region 0.01 i b , base current (amp) 0.02 0.05 1.2 0.4 0 80 h fe , dc current gain v ce = 2 v v ce = 5 v 0.1 0.2 0.5 1 figure 3. baseemitter voltage figure 4. collectoremitter saturation region figure 5. collector cutoff region 2 0.8 10 4 v be , base-emitter voltage (volts) 10 -1 0 t j = 25 c t j = 150 c 20 0.07 0.3 -0.4 figure 6. capacitance 500 v r , reverse voltage (volts) c ib 0.1 , collector current (a) m i c 0.05 10 3 10 2 10 1 10 0 -0.2 +0.2 +0.4 +0.6 reverse forward v ce = 250 v 70 10 2 20 500 1000 1.6 0.005 0.002 0.4 0 0.1 25 c -55 c 0.3 a i c = 0.1 a t j = -55 c 6 0.03 0.2 0.5 1 2 0.03 0.1 0.7 0.07 2 0.02 0.05 0.3 0.2 0.5 1 0.15 0.25 60 40 30 8 1 a v be(sat) @ i c /i b = 3 v be(on) @ v ce = 2 v 300 200 100 50 5 7 20 30 200 100 50 10 5 1 0.5 0.2 150 c 0.03 0.1 0.7 0.07 2 0.05 0.3 0.2 0.5 1 v, voltage (volts) v, voltage (volts) i c /i b = 3 0.5 a 1.5 a 25 c t j = -55 c 150 c 25 c c ob t j = 25 c 25 c t j = 150 c 125 c 100 c 75 c 50 c 25 c
mjd13003 http://onsemi.com 4 reverse bias safe operating area and inductive switching resistive switching output waveforms test circuits circuit values test waveforms note: pw and v cc adjusted for desired i c r b adjusted for desired i b1 5 v p w duty cycle 10% t r , t f 10 ns 68 1 k 0.001 m f 0.02 m f 1n493 3 270 +5 v 1 k 2n290 5 47 1/2 w 100 -v be(off) mje20 0 d.u.t. i b r b 1n493 3 1n493 3 33 33 2n222 2 1 k mje21 0 v cc +5 v l i c mr826 * v clamp *selected for 1 kv v ce 5.1 k 51 +125 v r c scope -4 v d 1 r b d.u.t. coil data: ferroxcube core #6656 full bobbin (~200 turns) #20 gap for 30 mh/2 a l coil = 50 mh v cc = 20 v v clamp = 300 vdc v cc = 125 v r c = 125 w d1 = 1n5820 or equiv. r b = 47 w i c v ce i c(pk) t 1 t f t t t 2 tim e v ce or v clamp t f clamped t 1 adjusted to obtain i c t 1 l coil (i c pk ) v cc t 2 l coil (i c pk ) v clamp test equipment scope-tektronics 475 or equivalent +10.3 v 25 m s 0 -8.5 v t r , t f < 10 ns duty cycle = 1.0% r b and r c adjusted for desired i b and i c table 1. test conditions for dynamic performance
mjd13003 http://onsemi.com 5 figure 7. inductive switching measurements t rv time i c v ce 90% i b1 t sv i cpk v clamp 90% v clamp 90% i c 10% v clamp 10% i cpk 2% i c i b t fi t ti t c table 2. typical inductive switching performance ???? ? ?? ? ???? i c amp ??? ? ? ? ??? t c  c ??? ? ? ? ??? t sv m s ??? ? ? ? ??? t rv m s ??? ? ? ? ??? t fi m s ???? ? ?? ? ???? t ti m s ??? ? ? ? ??? t c m s ???? ???? 0.5 ??? ??? 25 ??? ??? 1.3 ??? ??? 0.23 ??? ??? 0.30 ???? ???? 0.35 ??? ??? 0.30 ???? 05 ??? 100 ??? 1.6 ??? 0.26 ??? 0.30 ???? 0.40 ??? 0.36 ???? ???? 1 ??? ??? 25 ??? ??? 1.5 ??? ??? 0.10 ??? ??? 0.14 ???? ???? 0.05 ??? ??? 0.16 ???? ???? ??? ??? 100 ??? ??? 1.7 ??? ??? 0.13 ??? ??? 0.26 ???? ???? 0.06 ??? ??? 0.29 ???? ???? 1.5 ??? ??? 25 ??? ??? 1.8 ??? ??? 0.07 ??? ??? 0.10 ???? ???? 0.05 ??? ??? 0.16 ???? ???? 5 ??? ??? 100 ??? ??? 3 ??? ??? 0.08 ??? ??? 0.22 ???? ???? 0.08 ??? ??? 0.28 note: all data recorded in the inductive switching circuit in table 1 switching times note in resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage waveforms since they are in phase. however, for inductive loads which are common to switchmode power supplies and hammer drivers, current and voltage waveforms are not in phase. therefore, separate measurements must be made on each waveform to determine the total switching time. for this reason, the following new terms have been defined. t sv = voltage storage time, 90% i b1 to 10% v clamp t rv = voltage rise time, 1090% v clamp t fi = current fall time, 9010% i c t ti = current tail, 102% i c t c = crossover time, 10% v clamp to 10% i c an enlarged portion of the inductive switching waveforms is shown in figure 7 to aid in the visual identity of these terms. for the designer, there is minimal switching loss during storage time and the predominant switching power losses occur during the crossover interval and can be obtained using the equation: p swt = 1/2 v cc i c (t c )f in general, t rv + t fi t c . however, at lower test currents this relationship may not be valid. as is common with most switching transistors, resistive switching is specified at 25  c and has become a benchmark for designers. however, for designers of high frequency converter circuits, the user oriented specifications which make this a aswitchmodeo transistor are the inductive switching speeds (t c and t sv ) which are guaranteed at 100  c.
mjd13003 http://onsemi.com 6 t, time (s) m t, time (ms) 1 0.01 0.02 0.7 0.2 0.1 0.05 0.02 r(t), transient thermal resistance (normalized) 0.05 1 2 5 10 20 50 100 200 500 r q jc(t) = r(t) r q jc r q jc = 8.33 c/w max d curves apply for power pulse train shown read time at t 1 t j(pk) - t c = p (pk) q jc(t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 d = 0.5 0.2 0.05 0.01 single pulse 0.1 0.5 0.2 1 k 0.5 0.3 0.07 0.03 0.03 0.3 3 30 300 i c , collector current (amp) 0.02 0.2 1 0.1 t r 0.5 2 0.05 0.7 t d @ v be(off) = 5 v figure 8. turnon time figure 9. turnoff time 0.7 0.5 0.3 0.2 0.1 10 5 3 2 1 figure 10. thermal response 0.03 0.02 2 1 0.5 0.3 0.7 0.2 i c , collector current (amp) 0.1 0.5 20 0.3 0.7 0.02 0.2 10 v cc = 125 v i c /i b = 5 t j = 25 c 0.07 0.05 0.07 0.1 7 v cc = 125 v i c /i b = 5 t j = 25 c 0.03 0.07 0.3 0.05 0.03 0.01 t s t f 0.1 resistive switching performance
mjd13003 http://onsemi.com 7 the sale operating area figures shown in figures 11 and 12 are specified ratings for these devices under the test conditions shown. i c , collector current (amp) i c , collector current (amp) 1.6 0 800 0.4 100 300 t j 100 c i b1 = 1 a 500 700 v be(off) = 9 v 0 0.8 v cev , collector-emitter clamp voltage (volts) 1.2 500 m s 1 ms dc 5 5 v ce , collector-emitter voltage (volts) 0.01 10 500 1 0.5 2 0.2 0.05 0.02 second breakdown limit thermal limit @ 25 c wire bond limit 20 50 100 200 figure 11. active region safe operating area t c 25 c figure 12. reverse bias safe operating area 0.1 0.005 300 200 400 600 5 v 1.5 v curves apply be low rated v ceo 100 m s 3 v safe operating area information forward bias there are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. safe operating area curves indicate i c v ce limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. the data of figure 11 is based on t c = 25  c; t j(pk) is variable depending on power level. second breakdown pulse limits are valid for duty cycles to 10% but must be derated when t c 25  c. allowable current at the voltages shown on figure 11 may be found at any case temperature by applying curves on figure 13. t j(pk) may be calculated from the data in figure 10. at high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. reverse bias for inductive loads, high voltage and high current must be sustained simultaneously during turnoff, in most cases, with the base to emitter junction reverse biased. under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. this can be accomplished by several means such as active clamping, rc snubbing, load line shaping, etc. the safe level for these devices is specified as reverse bias safe operating area and represents the voltagecurrent conditions during reverse biased turnoff. this rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. figure 12 gives rbsoa characteristics. figure 13. power derating 25 25 t, temperature ( c) 0 50 75 100 125 150 20 15 10 5 p d , power dissipation (watts) 2.5 0 2 1.5 1 0.5 t a t c t c t a (surface mount)
mjd13003 http://onsemi.com 8 package dimensions case 369a13 issue w style 1: pin 1. base 2. collector 3. emitter 4. collector style 2: pin 1. gate 2. drain 3. source 4. drain style 3: pin 1. anode 2. cathode 3. anode 4. cathode style 4: pin 1. cathode 2. anode 3. gate 4. anode style 5: pin 1. gate 2. anode 3. cathode 4. anode d a k b r v s f l g 2 pl m 0.13 (0.005) t e c u j h t seating plane z dim min max min max millimeters inches a 0.235 0.250 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.033 0.040 0.84 1.01 f 0.037 0.047 0.94 1.19 g 0.180 bsc 4.58 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.102 0.114 2.60 2.89 l 0.090 bsc 2.29 bsc r 0.175 0.215 4.45 5.46 s 0.020 0.050 0.51 1.27 u 0.020 --- 0.51 --- v 0.030 0.050 0.77 1.27 z 0.138 --- 3.51 --- notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 123 4
mjd13003 http://onsemi.com 9 package dimensions style 1: pin 1. base 2. collector 3. emitter 4. collector notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. style 2: pin 1. gate 2. drain 3. source 4. drain style 3: pin 1. anode 2. cathode 3. anode 4. cathode style 4: pin 1. cathode 2. anode 3. gate 4. anode style 5: pin 1. gate 2. anode 3. cathode 4. anode 123 4 v s a k t seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.250 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.033 0.040 0.84 1.01 f 0.037 0.047 0.94 1.19 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.175 0.215 4.45 5.46 s 0.050 0.090 1.27 2.28 v 0.030 0.050 0.77 1.27 case 36907 issue k
mjd13003 http://onsemi.com 10 notes
mjd13003 http://onsemi.com 11 notes
mjd13003 http://onsemi.com 12 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mjd13003/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland


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